Designing the bootstrap supply for a high-side gate driver

An N-channel MOSFET turns on when its gate is about 10 V (its operating V_GS) above its source. For the low-side switch the source is ground, so the driver's 12 V supply (V_CC) does the job. For the high-side switch the source is the switch node (VS), which swings between 0 V and the full bus voltage (V_BUS). With the switch on, the gate has to sit at bus voltage + 10 V.

The bootstrap circuit is the cheapest way to get there. Three parts do it:

• Bootstrap capacitor C_BOOT between the driver's floating supply pin (VB) and the switch node (VS). It is the high-side driver's rechargeable battery.
• Bootstrap diode D_BOOT from the 12 V supply (V_CC) to VB.
• Bootstrap resistor R_BOOT (optional, but recommended) in series with the diode, to limit the charging and inrush current.

When the low-side switch is on, VS sits near ground and C_BOOT charges through the diode to about V_CC − V_F. When the high-side switch turns on, VS rises to the bus voltage, the diode blocks, and C_BOOT rides up with it. The driver now has V_CC − V_F between VB and VS to drive the gate.

The catch: C_BOOT only recharges while the low-side switch is on. Everything the high side consumes in between comes out of that one capacitor.

During each high-side on-time, C_BOOT supplies:

Q_TOTAL = Q_G + Q_LS + (I_QBS + V_GS/R_GS + I_LK) · t_on(max)

Use the longest high-side on-time the system can command: the highest duty cycle at the lowest switching frequency. In a motor drive that can be a full PWM period or longer during low-speed, high-torque operation.

The capacitor voltage drops by ΔV = Q_TOTAL / C_BOOT during the on-time. The floor is set by two limits:

• The driver's high-side under-voltage lock-out (V_BS UVLO, often 8–9 V). Below it, the driver switches the high side off on its own.
• The gate voltage the MOSFET needs for its rated on-resistance, usually 10 V. Above the UVLO, a weak gate still means a hot MOSFET.

C_BOOT ≥ Q_TOTAL / ΔV_allowed

Pick an allowed droop well inside that window (0.5 V is a good target), then add margin for capacitor tolerance and DC-bias derating. A ceramic X7R capacitor can lose 30–60 % of its capacitance at its working voltage, depending on case size and rating. Although VS swings up to the bus voltage, C_BOOT itself only ever sees about V_CC (12 V) across its terminals, so a 25 V or 50 V part keeps the DC-bias loss small.

Illustrative values: a 100 V MOSFET switched at 20 kHz, 12 V driver supply, duty cycle up to 95 %, 0.5 µs dead-time on each edge.

The charge:

• Gate: 60 nC
• Level shifter: 5 nC
• Driver quiescent: 100 µA × 47.5 µs = 4.8 nC
• Gate pull-down: (11.3 V / 47 kΩ) × 47.5 µs = 0.24 mA × 47.5 µs = 11.4 nC
• Total ≈ 81 nC; use 82 nC (rounded up, or the pull-down taken at the full 12 V)

The capacitor charges to about 12 − 0.7 = 11.3 V. For an allowed droop of 0.5 V:

C_BOOT(min) ≥ 82 nC / 0.5 V = 164 nF

Allowing ×3 for tolerance, ageing and DC-bias derating gives about 0.5 µF *effective* minimum. A 1 µF, 25 V or 50 V X7R capacitor in 0805 typically still provides 0.6 µF or more at 11.3 V bias, so it fits. With 0.6 µF effective installed, the actual droop each cycle is only ΔV = 82 nC / 0.6 µF ≈ 0.14 V.

Rule of thumb for the 12 V side: the driver's V_CC decoupling capacitor should be at least 10× C_BOOT, here 10 µF. Every recharge pulls a step of charge out of it, and you don't want V_CC dipping by the same amount.

C_BOOT only refills while the low-side switch is actually conducting. With D the high-side duty cycle and a dead-time on both edges of the low-side pulse:

t_L = (1 − D) / f_sw − 2 · t_dead

At high duty cycle the dead-time takes a large bite out of this window. The recharge path is R_BOOT, the diode's dynamic resistance and the low-side MOSFET:

τ = (R_BOOT + R_D + R_DS(on),LS) · C_BOOT ≈ (R_BOOT + R_D) · C_BOOT

The capacitor does not need to refill completely from empty every cycle. It only has to put back the small droop ΔV. When t_L is short compared with τ, part of the droop is left over, and the capacitor settles at a lower voltage where each recharge exactly replaces each discharge. That steady-state shortfall is:

V_short = ΔV · e^(−t_L/τ) / (1 − e^(−t_L/τ))

and the lowest voltage the high-side driver ever sees is:

V_BS(min) = V_CC − V_F − V_short − ΔV

For the example at 95 % duty: t_L = 2.5 µs − 2 × 0.5 µs = 1.5 µs, 0.6 µF effective, R_D ≈ 1 Ω and the actual droop ΔV = 0.14 V:

A smaller R_BOOT keeps the gate voltage up at high duty cycle, but the first charge of an empty capacitor then draws a large peak current through the diode and the low-side switch: (V_CC − V_F) / (R_BOOT + R_D).

All three values clear the 10 V target here, and 10 Ω does it with the lowest start-up peak. The catch is how little margin it leaves: 0.6 V above the target, with the capacitor at its nominal derated value. A capacitor at the low end of its tolerance, hot diode leakage or a longer dead-time each eat into that. 4.7 Ω buys another 0.3 V for a 2 A start-up peak, which is the choice we would make. Either way, use a pulse-rated resistor (0805 or 1206) to withstand repeated pre-charge pulses, and check the diode's surge rating.

100 % duty is impossible with a plain bootstrap: with the low side never on, the capacitor never refills. A drive that must hold the high side on indefinitely needs a charge pump or an isolated high-side supply. Many controllers simply enforce a minimum low-side pulse every cycle.

At power-up C_BOOT is empty. If the controller's first command is a high-side pulse, the driver's UVLO keeps the high side off, or worse, turns it on weakly.

• Pre-charge by turning the low-side switch on briefly before switching starts, for a few τ (typically 20–50 µs). In a three-phase motor drive with the rotor stationary, pulse all three low sides together: there is no phase-to-phase voltage, so no stator current flows.
• After a long idle or fault, repeat the pre-charge: leakage drains the capacitor.
• Caution with a spinning motor (flying restart): turning on all three low sides at once short-circuits the windings against the back-EMF. That is dynamic braking, with a sharp torque jolt and large phase currents. Instead, let the low-side body diodes recharge C_BOOT as each switch node swings low during free-wheeling, pulse one leg at a time with current limiting, or use a charge pump.

• Voltage rating: at least V_BUS(max), plus 20–30 % margin for switch-node overshoot. The VB pin swings to V_BUS + V_CC relative to ground, but the diode's own reverse voltage is only VB − V_CC ≈ V_BUS.
• Fast recovery: use an ultra-fast (t_rr < 35 ns) or Schottky diode. When the high side turns on, a slow diode conducts in reverse for its recovery time, dragging charge out of C_BOOT and injecting high-frequency ringing.
• Schottky caution: reverse leakage rises exponentially with temperature and drains C_BOOT for the whole on-time. Check the leakage at maximum junction temperature and include it in Step 1.
• Internal diodes: many drivers have a bootstrap diode or switch built in, but it often has 20–40 Ω of internal resistance. An external Schottky in parallel recharges much faster at high duty cycle.

When the high-side switch turns off with load current flowing, the current moves to the low-side body diode. Parasitic inductance in that loop forces VS below ground for a few nanoseconds, by L · di/dt, often 5–10 V or more on a fast, high-current stage.

Two things go wrong:

• Over-charging: with VS negative, the bootstrap diode charges C_BOOT beyond V_CC. VB − VS can easily exceed the driver's absolute maximum rating (for example 12 V − (−6 V) = 18 V).
• Driver upset: large negative VS can disturb the level shifter or latch some drivers.

Fixes:

• Keep the power loop small, and connect the driver's VS and COM close to the MOSFET source pins, not after a length of high-current copper.
• Add a small damping resistor (a few ohms) between the switch node and the driver's VS pin, and a Schottky clamp from COM to VS (anode to COM, cathode to VS) right at the driver pins.
• Connect C_BOOT directly across the driver's VB and VS pins, on the driver side of that damping resistor, with no vias in the loop if possible.
• Check the driver's negative VS transient rating and its dV_S/dt limit.

• Add up the total high-side charge per cycle: gate, level shift, quiescent, pull-down and hot leakage, at the longest on-time.
• Set the droop from the high-side UVLO and the MOSFET's required gate voltage, not from the gate charge alone.
• Derate ceramic capacitance for DC bias. Size for the *effective* value.
• Make the V_CC decoupling at least 10× C_BOOT.
• Check recharge at the highest duty cycle with the steady-state shortfall formula, dead-time included, and choose a pulse-rated R_BOOT. Use a charge pump if you need 100 % duty.
• Pre-charge before the first high-side pulse (only with the rotor stationary in a motor drive), and after long idle periods.
• Pick a fast diode rated for V_BUS plus ringing margin, and check its hot reverse leakage.
• Protect against negative VS undershoot: tight layout, C_BOOT right at the driver pins, a series damping resistor and a Schottky clamp.
• Measure VB − VS on the bench at maximum duty, minimum frequency and maximum temperature.

IDEAS designs gate drives, motor controllers and power converters, from component sizing to layout and bench validation. If a high-side switch runs hot or drops out at high duty cycle, talk to us.